23.1 Functional Description

The following sections provide a detailed description of the FIC subsystem.

Figure 23-2. Fabric Interface Controller Block Diagram

The preceding figure shows a block diagram for the FIC. The FIC is a hard block; enabling or disabling it will not consume any user logic. You can configure FIC_0 and FIC_1 independently from the Libero SoC MSS configurator. The following configuration options are available:

  • The MSS to the FPGA fabric interface
  • Advanced AHB-Lite options
  • The FPGA fabric Address Regions (MSS Master View)