13.2.2.1 Port List

The following table lists the SPI signals.

Table 13-1. SPI Interface Signals
Name Type Polarity Description
SPI_X_DI Input High Serial data input
SPI_X_DO Output High Serial data input
SPI_X_CLK Input/Output High Serial clock. It is a serial programmable bit rate clock out signal.

Input when SPI is in the slave mode.

Output when SPI is in the master mode.

SPI_X_SS[0] Input/Output Low,

except for TI mode

Slave select.

Input when SPI is in the slave mode.

Output when SPI is in the master mode.

The slave select output polarity is active Low. In TI mode the slave select output is inverted to become active High.

SPI_X_SS[7:1] Output Low,

except for TI mode

Extra slave select signal. Valid only in the Master mode.

The slave select output polarity is active-low. In TI mode, the slave select output is inverted to become active-high.

SPI_X_INT Output High SPI interrupt
SPI_X_DOE_N Output High Output enable
SPI_X_TXRFM Output High SPI ready to transmit. Used only by MSS PDMA engine
SPI_X_RXAVAIL Output High SPI received data. Used only by MSS PDMA engine.