13.2.2.1 Port List

The following table lists the SPI signals.

Table 13-1. SPI Interface Signals
NameTypePolarityDescription
SPI_X_DIInputHighSerial data input
SPI_X_DOOutputHighSerial data input
SPI_X_CLKInput/OutputHighSerial clock. It is a serial programmable bit rate clock out signal.

Input when SPI is in the slave mode.

Output when SPI is in the master mode.

SPI_X_SS[0]Input/OutputLow,

except for TI mode

Slave select.

Input when SPI is in the slave mode.

Output when SPI is in the master mode.

The slave select output polarity is active Low. In TI mode the slave select output is inverted to become active High.

SPI_X_SS[7:1]OutputLow,

except for TI mode

Extra slave select signal. Valid only in the Master mode.

The slave select output polarity is active-low. In TI mode, the slave select output is inverted to become active-high.

SPI_X_INTOutputHighSPI interrupt
SPI_X_DOE_NOutputHighOutput enable
SPI_X_TXRFMOutputHighSPI ready to transmit. Used only by MSS PDMA engine
SPI_X_RXAVAILOutputHighSPI received data. Used only by MSS PDMA engine.