19.2.3.2.3 Programming FPGA Fabric/eNVM

The watchdog timer has an input port called PROGRAMMING, which is connected to the watchdog_freeze signal in the microcontroller subsystem (MSS). The watchdog_freeze is asserted by the system controller under certain conditions, such as when programming the eNVM. When the PROGRAMMING port is asserted, the watchdog timer counting is paused. When the PROGRAMMING is de-asserted, the watchdog timer behaves as if it has just come out of reset.