7.7.19 PIR8
Peripheral Interrupt Request (Flag) Register 8
Note: Interrupt flag bits are
set when an Interrupt condition occurs, regardless of the state of
its corresponding enable bit or the Global Enable bit. User software
must ensure the appropriate interrupt flag bits are clear prior to
enabling an interrupt. This feature allows for software
polling.
| Name: | PIR8 |
| Offset: | 0x714 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SMT1PWAIF | SMT1PRAIF | SMT1IF | |||||||
| Access | R/W/HS | R/W/HS | R/W/HS | ||||||
| Reset | 0 | 0 | 0 |
Bit 2 – SMT1PWAIF SMT1 Pulse-Width Acquisition Interrupt Flag bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred (must be cleared by software) |
0 |
Interrupt event has not occurred |
Bit 1 – SMT1PRAIF SMT1 Period Acquisition Interrupt Flag bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred (must be cleared by software) |
0 |
Interrupt event has not occurred |
Bit 0 – SMT1IF SMT1 Interrupt Flag bit
| Value | Description |
|---|---|
1 |
Interrupt has occurred (must be cleared by software) |
0 |
Interrupt event has not occurred |