7.7.2 PIE0

Peripheral Interrupt Enable Register 0
Note:
  1. The External Interrupt INT pin is selected by INTPPS.
Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by PIE1-PIE8. Interrupt sources controlled by the PIE0 register do not require PEIE to be set in order to allow interrupt vectoring (when GIE is set).
Name: PIE0
Offset: 0x716

Bit 76543210 
   TMR0IEIOCIE   INTE 
Access R/WR/WR/W 
Reset 000 

Bit 5 – TMR0IE  Timer0 Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 4 – IOCIE  Interrupt-on-Change Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 0 – INTE  External Interrupt Enable bit(1)

ValueDescription
1 Enabled
0 Disabled
The External Interrupt INT pin is selected by INTPPS. Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by PIE1-PIE8. Interrupt sources controlled by the PIE0 register do not require PEIE to be set in order to allow interrupt vectoring (when GIE is set).