7.7.3 PIE1
Peripheral Interrupt Enable Register 1
Note: Bit PEIE of the
INTCON register must be set to enable any peripheral interrupt
controlled by registers PIE1-PIE8.
| Name: | PIE1 |
| Offset: | 0x717 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| OSFIE | CSWIE | ADTIE | ADIE | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 7 – OSFIE Oscillator Fail Interrupt Enable bit
| Value | Description |
|---|---|
1 |
Enabled |
0 |
Disabled |
Bit 6 – CSWIE Clock-Switch Interrupt Enable bit
| Value | Description |
|---|---|
1 |
Enabled |
0 |
Disabled |
Bit 1 – ADTIE ADC Threshold Interrupt Enable bit
| Value | Description |
|---|---|
1 |
Enabled |
0 |
Disabled |
Bit 0 – ADIE ADC Interrupt Enable bit
| Value | Description |
|---|---|
1 |
Enabled |
0 |
Disabled |
