2.47.47 FLEXCOM_SPI_CLOCK_PHASE Enum

C

/* SPI master mode */

typedef enum
{
	/* Input data is valid on clock trailing edge and output data is ready on leading edge */
    FLEXCOM_SPI_CLOCK_PHASE_TRAILING_EDGE = 0 << FLEX_SPI_CSR_NCPHA_Pos,
	
	/* Input data is valid on clock leading edge and output data is ready on trailing edge */
    FLEXCOM_SPI_CLOCK_PHASE_LEADING_EDGE = 1 << FLEX_SPI_CSR_NCPHA_Pos,

    /* Force the compiler to reserve 32-bit space for each enum value */
    FLEXCOM_SPI_CLOCK_PHASE_INVALID = 0xFFFFFFFF

}FLEXCOM_SPI_CLOCK_PHASE;

Summary

Identifies FLEXCOM SPI Clock Phase Options

Description

This enumeration identifies possible FLEXCOM SPI Clock Phase Options

Remarks

None