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10
SmartGen Cores Reference
10.4
Memory and Controllers
10.4.8
Synchronous FIFO for IGLOO®, ProASIC® 3, SmartFusion® and Fusion®
10.4.8.3
Synchronous FIFO for IGLOO®, ProASIC® 3, SmartFusion® and Fusion Description
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FlashROM, Analog System Builder, and Flash Memory System Builder
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Designer Documentation Catalog
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Libero IDE
6
Design Constraints for Software
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Innoveda eProduct Designer Interface Guide - UNIX
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Innoveda eProduct Designer Interface Guide – Windows
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SmartGen Cores Reference
10.1
Basic Blocks
10.2
Clock and Management
10.3
Fusion Peripherals
10.4
Memory and Controllers
10.4.1
Creating a RAM for IGLOO®, ProASIC® 3, SmartFusion® and Fusion
10.4.2
FIFO Flag Controller (no RAM)
10.4.3
Axcelerator FIFO
10.4.4
Soft FIFO Controller
10.4.5
Synchronous/Asynchronous Dual Port FIFO for ProASIC® and ProASIC®PLUS
10.4.6
Synchronous Dual Port FIFO with Flags
10.4.7
Synchronous Dual Port FIFO without Flags
10.4.8
Synchronous FIFO for IGLOO®, ProASIC® 3, SmartFusion® and Fusion®
10.4.8.1
Synchronous FIFO for IGLOO®, ProASIC® 3, SmartFusion® and Fusion Functionality
10.4.8.2
Using FIFO Flags
10.4.8.3
Synchronous FIFO for IGLOO®, ProASIC® 3, SmartFusion® and Fusion Description
10.4.8.3.1
Signals in Generated Netlists
10.4.8.4
Synchronous FIFO for IGLOO®, ProASIC® 3, SmartFusion® and Fusion Implementation Rules/Timing Diagrams
10.4.9
FIFO Using Distributed Memory for ProASICPLUS®
10.4.10
Axcelerator® RAM
10.4.11
RAM Content Manager Summary
10.4.12
Dual Port RAM for IGLOO®, ProASIC® 3 and Fusion®
10.4.13
Synchronous/Asynchronous Dual Port RAM for DX/MX
10.4.14
Synchronous/Asynchronous Dual Port RAM for ProASICPLUS®
10.4.15
Two Port RAM
10.4.16
RAM with Initialization
10.5
Power Management
10.6
Revision History
10
Microchip FPGA Support
10
Microchip Information
11
HDL Coding Style
12
Libero IDE Documentation Catalog
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Libero IDE
14
Antifuse Macro Library Guide for Software
15
MultiView Navigator
16
NetlistViewer (non-MVN)
17
IGLOO, ProASIC3, SmartFusion and Fusion Macro Library for Software
18
ProASIC and ProASIC PLUS Macro Library for Software
19
PinEditor (non-MVN)
20
SmartPower
21
SmartTime
22
Timer
23
VHDL Vital Simulation
24
Verilog Simulation
25
Technical Support
26
About Microchip
10.4.8.3 Synchronous FIFO for
IGLOO
®
,
ProASIC
®
3,
SmartFusion
®
and Fusion Description
Rev: A
