4.4.5.1 Data Access from Program Memory Using Table Instructions
The TBLRDL
and TBLWTL
instructions offer a direct method of reading or writing the lower word
of any address within the Program Space without going through Data Space. The TBLRDH
and TBLWTH
instructions are the only method to read or write the upper eight bits of a Program Space
word as data.
The PC is incremented by two for each successive 24-bit program word. This
allows program memory addresses to directly map to Data Space addresses. Program memory can
thus be regarded as two 16-bit wide word address spaces, residing side by side, each with
the same address range. TBLRDL
and TBLWTL
access the space that contains the least significant
data word. TBLRDH
and TBLWTH
access the space that contains the upper data byte.
Two table instructions are provided to move byte or word-sized (16-bit) data to and from Program Space. Both function as either byte or word operations.
TBLRDL
(Table Read Low):- In Word mode, this instruction maps the lower word of the Program Space location (P[15:0]) to a data address (D[15:0]).
- In Byte mode, either the upper or lower byte of the lower
program word is mapped to the lower byte of a data address. The upper byte is
selected when Byte Select is ‘
1
’; the lower byte is selected when it is ‘0
’.
TBLRDH
(Table Read High):- In Word mode, this instruction maps the entire upper word of a
program address (P[23:16]) to a data address. The ‘phantom’ byte (D[15:8]) is
always ‘
0
’. - In Byte mode, this instruction maps the upper or lower byte of
the program word to D[7:0] of the data address in the
TBLRDL
instruction. The data are always ‘0
’ when the upper ‘phantom’ byte is selected (Byte Select =1
).
- In Word mode, this instruction maps the entire upper word of a
program address (P[23:16]) to a data address. The ‘phantom’ byte (D[15:8]) is
always ‘
In a similar fashion, two table instructions, TBLWTH
and
TBLWTL
, are used to write individual bytes or words to a Program Space
address. The details of their operation are explained in Flash Program Memory.
For all table operations, the area of program memory space to be accessed
is determined by the Table Page register (TBLPAG). TBLPAG covers the entire program memory
space of the device, including user application and configuration spaces. When
TBLPAG[7] = 0
, the table page is located in the user memory space. When
TBLPAG[7] = 1
, the page is located in configuration space.