13.16.2 V_BOOT Voltage Regulator

The V_BOOT voltage regulator rail is used to supply bias voltage for the integrated 3-phase power MOSFET bridge drivers.

The regulator is capable of supplying 30 mA of external load current. The regulator has a minimum overcurrent limit of 40 mA.

The regulator gets its power from the integrated charge pump. When operating at supply voltages (HV_DD) that are above +13.5V, the integrated charge pump will be disabled and the HV_DD supply will power the VB_OOT voltage regulator. The V_BOOT regulator output may be lower than the designed voltage, while operating in the HV_DD range of +12.5V to +13.0V, due to the dropout voltage of the regulator.

The V_BOOT regulator requires an output capacitor, connected from V_BOOT to LIN_VSS, to stabilize the internal control loop and to sustain the bootstrap capacitor energy. A minimum of 4.7 µF ceramic output capacitance is required for the V_BOOT voltage regulator output; 10 µF is recommended when switching large MOSFET gate loads. The output capacitor forces a time delay between setting the OE pin high (to transition from Standby mode to Active mode) and the V_BOOT regulator voltage output rising above the voltage required to set an internal V_BOOT ready flag. The PWM inputs must not be activated while the V_BOOT output is charging the output capacitors to the V_BOOT ready voltage (typically 6.0V). The time required before allowing the PWM inputs to become active, after setting OE high to transition from Standby mode to Active mode, is dependent on output capacitance, any extra loads and supply voltage ramp-up time. The user should allow a minimum time of 0.94 ms for the V_BOOT output voltage to rise above the V_BOOT ready voltage. A voltage of 6V and supply current of 30 mA may be used for this delay estimation. See Equation 13-2.

There is a time-out function that allows the state machine to move from V_BOOT to active after 15 ms, regardless of the V_BOOT ready voltage. This time-out function prevents the driver from hanging up if the V_BOOT voltage is overloaded.

There is also a capacitive voltage divider formed by the three bootstrap capacitors and the V_BOOT capacitor. The V_BOOT capacitor should be selected so that when the V_BOOT supply is active and the bootstrap capacitors are charged, the voltage at the bootstrap capacitors will be greater than the driver undervoltage shutdown voltage, 4.5V. For a system with V_BOOT = 12V, VMIN = 4.5V and N = 3 x 1 µF C_BOOTSTRAP capacitors charging at the same time, the desired CV_BOOT capacitor is 1.8 µF (see Equation 13-3). Since the V_BOOT supply requires a 4.7 µF capacitor, a 4.7 µF capacitor should be used. The initial voltage seen by the bootstrap capacitors using a 4.7 µF V_BOOT capacitor will be 7.32V. See Equation 13-4.

The V_BOOT output is disabled when the driver transitions to Standby or Sleep mode. Table 13-5 shows the Faults that will also disable the V_BOOT voltage regulator.