13.1.1 DS60001765C - 12/2024

SectionChanges
General
  • Added Extended Temperature industrial device information
  • Data sheet format reworked
Configuration SummaryReworked Table 1-1
Package and Pinout

Updated Figure 1-2

Memories

Added LPDDR2 Power Failure Management

Static Memory Controller (SMC)

Embedded Characteristics: added ONFI compliance content

Chip Identifier (CHIPID)

Embedded Characteristics: updated Table 4-3 CHIPID_EXID value

CHIPID_CIDR: bit name changed from 1 to ONE

Special Function Registers Backup (SFRBU)

SFRBU_PSWBU: changed register name to "VDDBU Power Switch Control Register"; updated SOFTSWITCH description

Power Management Controller (PMC)

PMC_IER, PMC_IDR, PMC_SR, PMC_IMR: updated MCKXRDY definition

CSI-2 Demultiplexer Controller (CSI2DC)

YUV 420 8-bit Legacy Mode: updated Figure 6-11; added Note

YUV 420 8-bit Mode: updated Table 6-15 and Table 6-16

Image Sensor Controller (ISC)

Updated Defective Pixel Correction (DPC), Green Disparity Correction (GDC), Black Level Correction (BLC), White Balance (WB) Module, Rounding, Limiting and Packing (RLP) Module

ISC_INTEN, ISC_INTDIS, ISC_INTMASK, ISC_INTSR: removed WPE

Inter-IC Sound Multi-Channel Controller (I2SMCC)

TDM Reception and Transmission Sequence: added note

Updated Figure 7-8

I2SMCC_MRA: updated TDMFS description

Synchronous Serial Controller (SSC)

Updated Embedded Characteristics (added “Up to 16 Channels in TDM Mode”)

Analog-to-Digital Converter (ADC) Controller

Updated Table 5-2

ADC_CR: corrected SWFIFO bit position from 3 to 5

Advanced Encryption Standard (AES)

Clearing Key on Tamper Event: updated event name and number of wake-up indexes

AES_CR: index 1 now ‘reserved’

Triple Data Encryption Standard (TDES)

Clearing Key on Tamper Event: corrected number of wake-up indexes

Security Module (SECUMOD)

SECUMOD_NMPR, SECUMOD_NIEPR, SECUMOD_NIDPR, SECUMOD_NIMPR: index 5 now ‘reserved’

Flexible Serial Communication Controller (FLEXCOM)

Updated I/O Lines Description, Baud Rate Generator, Baud Rate in Synchronous Mode, FIFO Overflow/Underflow Error, FIFO Overflow/Underflow Error, FIFO Overflow/Underflow Error

FLEX_US_FESR, FLEX_SPI_SR, FLEX_TWI_FSR: updated TXFPTEF and RXFPTEF definitions

FLEX_SPI_MR: added LSBHALF

FLEX_TWI_SR (DEFAULT_MODE), FLEX_TWI_SR (FIFO_ENABLED): index 17 now ‘reserved’

FLEX_TWI_SMBTR, FLEX_TWI_SWMR: added WPEN information

Quad Serial Peripheral Interface (QSPI)

Embedded Characteristics: added supported standards

Memory Registers/Commands Access: added note about the RBSYERR flag

Added Peripheral Bus Access Errors, Figure 9-156, Figure 9-158, Figure 9-160, Figure 9-162, Figure 9-164

Updated Initialization Procedure, HyperFlash Mode, Twin-Quad Mode, Figure 9-165

Instruction Frame Transmission Examples: corrected address range used in examples

QSPI_IFR: corrected PROTTYP and NBDUM field sizes; updated PROTTYP description

Gigabit Ethernet MAC (GMAC)

Updated PHY Interface

GMAC_RPSF: corrected RPB1ADR field width
USB Device High Speed Port (UDPHS)

Removed Typical Connection

Electrical CharacteristicsUpdated the following tables:
Product Identification SystemAdded Software License Level content; updated Pattern information