2.6.45 LDO2 HIBERNATE Mode Status

Name:	LDO2-HIB
Address:	0x62
Default:	0b00 (VSETL2 pin definition)
Property:	R/W


Bit	7	6	5	4	3	2	1	0
	EN	Reserved	VSET[5:0]
Access	R/W	R	R/W	R/W	R/W	R/W	R/W	R/W
Default	0	0	0	0	0	0	0	0

Bit 7 – EN Enable bit of the HIBERNATE Mode Status

The regulator is enabled if EN = 1.

Bit 6 – Reserved

Maintain as ‘0’

Bits 5:0 – VSET[5:0] Output voltage selection bits for the HIBERNATE Mode Status

Its default value is defined by the resistor at the VSETL2 pin during power-on start.

DS20007136A

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.