2.6.5 System Configuration
| Name: | SYS-CFG |
| Address: | 0x03 |
| Default: | 0xC0 |
| Property: | R/W |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TSDMSK | TWRMSK | HPMPEN | AWKPDIS | FSD [1:0] | B1HCEN | USER | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Default | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – TSDMSK Thermal Shutdown Masking Bit
If the bit is 1, it will prevent nINTO from being asserted LOW upon TSD = 1. Default is 1 (Thermal Shutdown TSD will not be flagged by nINTO).
Bit 6 – TWRMSK Thermal Warning Masking Bit
If the bit is 1, it will prevent nINTO from being asserted LOW upon a Thermal Warning event. Default is 1 (Thermal Warning will not be flagged by nINTO).
Bit 5 – HPMPEN High-Performance Mode Enable Pin Bit
This bit must be set to 1 through an I2C command in order to enable the HPM pin. If the bit is 0, setting the HPM pin high will have no effect on the power status state machine.
Bit 4 – AWKPDIS Automatic Wake-Up Pulse DISable Bit
If the bit is set to 1, it disables the generation of a wake-up pulse on pin nSTRTO before an automatic start-up sequence after a fault (thermal shutdown or hiccup with HCPEN = 0) occurred in HIBERNATE mode.
Bits 3:2 – FSD [1:0] Switching (oscillator) frequency displacement bits, default is 00 (no displacement)
Bit 1 – B1HCEN Buck1 Hysteretic Control Mode Enable Bit
When set to 1, this bit enables the Hysteretic Control Mode for Buck1 in AutoPFM operation.
Bit 0 – USER User-accessible bit
User-accessible bit that can be used to store system information. This bit is volatile and it is cleared upon SVIN UVLO.
