21.13.1.17 fhb_control

Description

This Tcl command provides FPGA Hardware Breakpoint (FHB) capability for SmartDebug.

fhb_control [-deviceName "device name"] -halt \
            -clock_domain {clock domain name(s)/all}

fhb_control [-deviceName "device name"] -run \
            -clock_domain {clock domain name(s)/all}

fhb_control [-deviceName "device name"] -step {number of steps} \
            -clock_domain {clock domain name(s)/all}

fhb_control [-deviceName "device name"] -reset \
            -clock_domain {clock domain name(s)/all}

fhb_control [-deviceName "device name"] -arm_trigger \
–trigger_signal {probe point signal to trigger the HALT operation} \
–trigger_edge_select {rising} -clock_domain {clock domain name(s)/all}

fhb_control [-deviceName "device name"] \
            [-capture_waveform "integer value"] \
            [-vcd_file "Waveform File"] 

fhb_control [-deviceName "device name"] \
            [-clock_domain_status] \
            -clock_domain {clock domain name(s)/all}

fhb_control [-deviceName "device name"] \
            [-capture_waveform "integer value"] \
            [-vcd_file "Waveform File"]

Arguments

ParameterTypeDescription

deviceName

string

Specify device name. This parameter is optional if only one device is available in the current configuration.

clock_domain

string

Specifies clock domain names to halt|run|step|reset|disarm|. Can be single or multiple clock domains, halted in order specified by user.

halt

none

Specifies to halt the clock.

run

none

Specifies to run the clock.

step

integer

Specifies to step the clock "number of steps" times. Minimum value is 1.

reset

none

Specifies to reset FHB configuration for the specified clock domain.

arm

none

Specifies to arm FHB configuration for the specified clock domain.

trigger_signal

string

probe point signal to trigger the HALT operation} Set the trigger signal to arm the FHBs.

trigger_edge_select

string

Specifies the trigger signal edge to arm the FHBs. FHBs will be armed on rising edge of trigger signal.

delay

integer

Sepcifies the value between 0 to 255 of delay cycles before halt.

clock_domain_status

none

Specifies to read and display status of specified clock domain(s). Can be single or multiple clock domains.

disarm

none

Specifies to disarm FHB configuration for the specified clock domain.

capture_waveform

integer

Specifies to capture waveform of all the added signals to active probes in the specified clock domain for "number of steps".

vcd_file

string

Target file to save the data and see the waveform.

Return TypeDescription
NoneNone

Error Codes

Error CodeDescription

None

Fhb control: One of the following parameters should be set:-halt, -run, -step, -arm, -disarm, -clock_domain_status, -reset and -capture_waveform

None

Fhb control: Clock Domain all not found in the design.

None

step: Invalid argument value: 'step_value' (expecting integer value).

None

Fhb control: Minimum value of -step should be 1.

None

Fhb control: -trigger_edge_select parameter value can only be rising.

None

capture_waveform: Invalid argument value: 'capture_waveform value' (expecting integer value).

None

Fhb control: Minimum value of -capture_waveform should be 1.

Supported Families

PolarFire

PolarFire SoC
SmartFusion 2
IGLOO 2
RTG4

Example

fhb_control -halt -clock_domain {“FCCC_0/GL0_INST “ “FCCC_0/GL1_INST” }
fhb_control -run -clock_domain {“FCCC_0/GL0_INST “ “FCCC_0/GL1_INST” }
fhb_control -step -clock_domain {“FCCC_0/GL0_INST “ “FCCC_0/GL1_INST” }
fhb_control -reset -clock_domain {“FCCC_0/GL0_INST “ “FCCC_0/GL1_INST” }
fhb_control -arm_trigger -trigger_signal {q_0_c[14]:count_1_q[14]:Q} \
            -trigger_edge_select {rising} -delay 0 \
            -clock_domain {"FCCC_0/GL0_INST"}
fhb_control -disarm_trigger -trigger_signal {q_0_c[14]:count_1_q[14]:Q} \
            -trigger_edge_select {rising} -delay 0 \
            -clock_domain {"FCCC_0/GL0_INST"}
fhb_control -capture_waveform {10} \
            -vcd_file {D:/wvf_location/waveform.vcd}
fhb_control -clock_domain_status \
-clock_domain { "FCCC_0/GL0_INST" "FCCC_0/GL1_INST" "FCCC_0/GL2_INST" }

See Also

  • event_counter

  • run_frequency_monitor