44.4.1.2 USB OTG Interrupt Enable Register
| Name: | UOTGIE |
| Offset: | 0x4050 |
| Reset: | 0x0 |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| IDIE | T1MSECIE | LSTATEIE | ACTVIE | SESVDIE | SESENDIE | VBUSVDIE | |||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – IDIE ID Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | ID interrupt enabled |
| 0 | ID interrupt disabled |
Bit 6 – T1MSECIE 1 Millisecond Timer Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | 1 millisecond timer interrupt enabled |
| 0 | 1 millisecond timer interrupt disabled |
Bit 5 – LSTATEIE Line State Interrupt Enable bit
Write a ‘1’ to this bit to clear the interrupt.
| Value | Description |
|---|---|
| 1 | Line state interrupt enabled |
| 0 | Line state interrupt disabled |
Bit 4 – ACTVIE Bus Activity Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Bus activity interrupt enabled |
| 0 | Bus activity interrupt disabled |
Bit 3 – SESVDIE Session Valid Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | Session valid interrupt enabled |
| 0 | Session valid interrupt disabled |
Bit 2 – SESENDIE B-Session End Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | B-session end interrupt enabled |
| 0 | B-session end interrupt disabled |
Bit 0 – VBUSVDIE A-VBUS Valid Interrupt Enable bit
| Value | Description |
|---|---|
| 1 | A-VBUS valid interrupt enabled |
| 0 | A-VBUS valid interrupt disabled |