44.4.1.20 USB Configuration 1 Register
| Name: | UCNFG1 |
| Offset: | 0x42E0 |
| Reset: | 0x0 |
| Property: | - |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| UTEYE | UOEMON | USBSIDL | UASUSPND | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
Bit 7 – UTEYE USB Eye-Pattern Test Enable bit
| Value | Description |
|---|---|
| 1 | Eye-Pattern test is enabled |
| 0 | Eye-Pattern test is disabled |
Bit 6 – UOEMON USB OE Monitor Enable bit
| Value | Description |
|---|---|
| 1 | OE signal is active; it indicates intervals during which the D+/D- lines are driving |
| 0 | OE signal is inactive |
Bit 4 – USBSIDL Stop in Idle Mode bit
| Value | Description |
|---|---|
| 1 | Discontinue module operation when device enters Idle mode |
| 0 | Continue module operation in Idle mode |
Bit 0 – UASUSPND Automatic Suspend Enable bit
| Value | Description |
|---|---|
| 1 |
USB OTG module automatically suspends upon entry to Sleep mode. See the USUSPEND bit (U1PWRC[1]) in register UTOK TBD. |
| 0 | USB OTG module does not automatically suspend upon entry to Sleep mode. Software must use the USUSPEND bit (U1PWRC[1]) to suspend the module, including the USB 48 MHz clock. |