22.2.15 PTG Step Queue 1 Pointer Register
| Name: | PTGQUE1 |
| Offset: | 0x932 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| STEP3[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| STEP2[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:8 – STEP3[7:0] PTG Command 2n+1 bits
A queue location for storage of the STEP(2n+1) command byte, where ‘n’ is from PTGQUEn.
Bits 7:0 – STEP2[7:0] PTG Command 2n bits
A queue location for storage of the STEP(2n) command byte, where ‘n’ is the odd numbered Step Queue Pointers.