14.4 DAC Control Registers


Offset	Name	Bit Pos.	7	6	5	3	2	1	0
0x0C80	DACCTRL1L	15:8	DACON		DACSIDL
0x0C80	DACCTRL1L	7:0	CLKSEL[1:0]		CLKDIV[1:0]		FCLKDIV[2:0]
0x0C82 ... 0x0C83	Reserved
0x0C84	DACCTRL2L	15:8						TMODTIME[9:8]
0x0C84	DACCTRL2L	7:0	TMODTIME[7:0]
0x0C86	DACCTRL2H	15:8						SSTIME[9:8]
0x0C86	DACCTRL2H	7:0	SSTIME[7:0]
0x0C88	DAC0CONL	15:8	DACEN	IRQM[1:0]			CBE		FLTREN
0x0C88	DAC0CONL	7:0	CMPSTAT	CMPPOL	INSEL[2:0]		HYSPOL	HYSSEL[1:0]
0x0C8A	DAC0CONH	15:8						TMCB[9:8]
0x0C8A	DAC0CONH	7:0	TMCB[7:0]
0x0C8C	DAC0DATL	15:8				DACLOW[11:8]
0x0C8C	DAC0DATL	7:0	DACLOW[7:0]
0x0C8E	DAC0DATH	15:8				DACDAT[11:8]
0x0C8E	DAC0DATH	7:0	DACDAT[7:0]
0x0C90	SLP0CONL	15:8	HCFSEL[3:0]			SLPSTOPA[3:0]
0x0C90	SLP0CONL	7:0	SLPSTOPB[3:0]			SLPSTRT[3:0]
0x0C92	SLP0CONH	15:8	SLOPEN			HME	TWME	PSE
0x0C92	SLP0CONH	7:0
0x0C94	SLP0DAT	15:8	SLPDAT[15:8]
0x0C94	SLP0DAT	7:0	SLPDAT[7:0]
0x0C96 ... 0x0C97	Reserved
0x0C98	DAC1CONL	15:8	DACEN	IRQM[1:0]			CBE		FLTREN
0x0C98	DAC1CONL	7:0	CMPSTAT	CMPPOL	INSEL[2:0]		HYSPOL	HYSSEL[1:0]
0x0C9A	DAC1CONH	15:8						TMCB[9:8]
0x0C9A	DAC1CONH	7:0	TMCB[7:0]
0x0C9C	DAC1DATL	15:8				DACLOW[11:8]
0x0C9C	DAC1DATL	7:0	DACLOW[7:0]
0x0C9E	DAC1DATH	15:8				DACDAT[11:8]
0x0C9E	DAC1DATH	7:0	DACDAT[7:0]
0x0CA0	SLP1CONL	15:8	HCFSEL[3:0]			SLPSTOPA[3:0]
0x0CA0	SLP1CONL	7:0	SLPSTOPB[3:0]			SLPSTRT[3:0]
0x0CA2	SLP1CONH	15:8	SLOPEN			HME	TWME	PSE
0x0CA2	SLP1CONH	7:0
0x0CA4 ... 0xCA41	Reserved
0xCA42	SLP1DAT	15:8	SLPDAT[15:8]
0xCA42	SLP1DAT	7:0	SLPDAT[7:0]