28.3.8 PTG Counter 1 Limit Register
Legend: R = Readable bit, W = Writable bit
Note:
- These bits are read-only when the module is executing step commands.
- The value read from these register bits depends on the PTGIVIS bit (PTGCON[8]). Refer to Control Register Access for more information.
| Name: | PTGC1LIM |
| Offset: | 0x351C |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PTGC1LIM[15:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PTGC1LIM[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bits 15:0 – PTGC1LIM[15:0] PTG Counter 1 Limit Register bits(1,2)
This register is used to specify the loop count for the PTGJMPC1
step command or as a Limit register for the General Purpose Counter 1.