7.1.2 FICD Configuration Register
Legend: R = Readable bit, W = Writable bit
| Name: | FICD |
| Offset: | 0x7F3010 |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| NOBTSWP | |||||||||
| Access | R | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| BKBUG | JTAGEN | ||||||||
| Access | R | R/W | |||||||
| Reset | 0 | 0 |
Bit 15 – NOBTSWP BOOTSWP instruction disable bit
| Value | Description |
|---|---|
1 |
BOOTSWP instruction is disabled. |
0 |
BOOTSWP instruction is enabled. |
Bit 7 – BKBUG Background Debugger Enable bit (active low)
| Value | Description |
|---|---|
1 |
Background debugger is disabled. |
0 |
Background debugger functions are enabled. |
Bit 5 – JTAGEN JTAG Enable bit
| Value | Description |
|---|---|
1 |
JTAG port is enabled. |
0 |
JTAG port is disabled. |