26.5.7.2 Input Capture Data Buffer Access

The CCPxBUFL register bits’ location provides user access to a four-level deep FIFO used in Input Capture modes. During normal operation, the CCPxBUFL register bits location is read until ICBNE (CCPxSTAT[0]) = 0. The ICOV (CCPxSTAT[1]) status bit tells the user if the FIFO buffer size has been exceeded, therefore losing the most recently captured data.

When operating in a 32-bit Input Capture mode, a two-level FIFO buffer is available. The CCPxBUF register provides access to the FIFO. The ICBNE and ICOV status bits operate similarly to 16-bit capture operations.