Contents
Scope
1. Introduction
1.1. Document Layout
1.2. Reference Documents
2. Product Overview
2.1. SAMA5D2-ICP Features
2.2. SAMA5D2-ICP Kit Content
2.3. Evaluation Kit Specifications
2.4. Power Sources
3. Board Components
3.1. Board Overview
3.1.1. Default Jumper Settings
3.1.2. On-Board Connectors
3.2. Function Blocks
3.2.1. Power Supply Topology and Power Distribution
3.2.1.1. Input Power Options
3.2.1.2. Power Supply Requirements and Restrictions
3.2.1.3. Power-Up and Power-Down Considerations
3.2.1.4. Power Management
3.2.1.4.1. Configuration
3.2.1.4.2. Interfacing Signals
3.2.1.4.3. nSTRT, nSTRTO, PWRHLD Functionality
3.2.1.4.4. nSTRT / PWRHLD Typical Use Cases
3.2.1.4.5. PWRHLD, LPM, HPM and Power States Definitions
3.2.1.4.6. I2C Interface Description
3.2.1.5. Current Measurement
3.2.2. Processor
3.2.2.1. Supply Group Configuration
3.2.3. Clock Circuitry
3.2.3.1. Reset Circuitry
3.2.3.2. Power Backup Supply
3.2.4. Push Button Switches
3.2.5. Memory
3.2.5.1. Memory Organization
3.2.5.2. DDR3L SDRAM
3.2.5.3. DDR_CAL Analog Input
3.2.6. Additional Memories
3.2.6.1. QSPI Serial Flash
3.2.6.1.1. CS Disable
3.2.6.2. CryptoAuthenticationâ„¢
3.2.6.3. Serial EEPROM with Unique MAC Address
3.2.7. Secure Digital Multimedia Card (SDMMC) Interface
3.2.7.1. Secure Digital Multimedia (SDMMC) Controller
3.2.7.2. SD Card Socket
3.2.8. Communication Interfaces
3.2.8.1. Clock Generator
3.2.8.2. 10/100 Ethernet Switch
3.2.8.2.1. External Chip Reset
3.2.8.3. 1-Gbit Ethernet HSIC
3.2.8.3.1. External EEPROM / Internal OTP
3.2.8.3.2. Enable Link Status LEDs
3.2.8.3.3. External Chip Reset
3.2.8.4. EtherCAT
3.2.8.4.1. External Chip Reset
3.2.8.5. USB Host/Device Ports
3.2.8.6. USB-A Interface
3.2.8.6.1. USB-A VBUS Detection
3.2.8.7. USB-B Hub Interface
3.2.8.7.1. External Chip Reset
3.2.8.7.2. Port Power LEDs
3.2.8.7.3. Connectors
3.2.8.8. Wi-Fi/BT
3.2.8.9. CAN Interface
3.2.8.9.1. Normal Mode
3.2.8.9.2. Standby Mode
3.3. External Interfaces
3.3.1. On-Board LEDs
3.3.1.1. RGB LED
3.4. Debugging Capability
3.4.1. Debug JTAG
3.4.1.1. Debug COM Port Interface
3.4.2. Embedded Debugger (J-Link-OB) Interface
3.4.2.1. Disabling J-Link-OB
3.4.2.2. Hardware UART via CDC
3.4.2.3. Board Edge Connector (J15)
3.5. PIO Usage on Expansion Connectors
3.5.1. PIOBU Interface
3.5.2. mikroBUS Interface
4. Board Layout
5. Installation and Operation
5.1. System and Configuration Requirements
5.2. Board Setup
6. Revision History
6.1. Rev. B - 09/2020
6.2. Rev. A - 02/2020
The Microchip Website
Product Change Notification Service
Customer Support
Microchip Devices Code Protection Feature
Legal Notice
Trademarks
Quality Management System
Worldwide Sales and Service