PLL Control A
Name:
PLLCTRLA
Offset:
0x10
Reset:
0x00
Access:
Configuration Change Protection
Bit76543210
RUNSTDBYSOURCEMULFAC[1:0]
AccessR/WR/WR/WR/W
Reset0000

Bit 7 – RUNSTDBY: Run Standby

Run Standby

This bit controls whether the Phase-Locked Loop (PLL) is always running or not.

Notes:
  1. 1.The requesting peripheral must take the PLL start-up time and PLL source start-up time into account.
  2. 2.The oscillator signal will only be available if requested and will be available after two PLL cycles.

ValueDescription
0 The PLL will only run if requested by a peripheral (1)
1 The PLL will always run in Active, Idle and Standby sleep modes (2)

Bit 6 – SOURCE: Select Source for PLL

Select Source for PLL

This bit controls the Phase-Locked Loop (PLL) clock source.

Value Name Description
0x0 OSCHF The high-frequency internal oscillator as a PLL source
0x1 XOSCHF High-frequency external clock or external high-frequency oscillator as a PLL source

Bits 1:0 – MULFAC[1:0]: Multiplication Factor

Multiplication Factor

This bit field controls the multiplication factor for the Phased-Locked Loop (PLL).
Value Name Description
0x0 DISABLE PLL is disabled
0x1 2x 2 x multiplication factor
0x2 3x 3 x multiplication factor
0x3 - Reserved