The MVIO feature allows a subset of the I/O pins to be powered by a different I/O voltage domain than the rest of the I/O pins, eliminating the need for having external level shifters for communication or control of external components running on a different voltage level. A voltage applied to the VDDIO2 power pin(s) supplies the MVIO-capable I/O pins, while the voltage applied to the VDD pin(s) supplies the regular I/O pins.

The MVIO can be configured in one of two supply modes:

A configuration fuse determines the MVIO supply mode. The loss or gain of power on VDDIO2 is signaled by a status register bit. This status bit has corresponding interrupt and event functionality.

The MVIO pins are capable of the same digital behavior as regular I/O pins, e.g., GPIO, serial communication (USART, SPI, I2C), or connected to PWM peripherals. The input Schmitt trigger levels are scaled according to the VDDIO2 voltage, as described in the Electrical Characteristics section of the data sheet.

A divided-down VDDIO2 voltage is available as input to the ADC.