The following configuration values are valid for all listed bit names of this register:
0: No effect.
1: Clears the corresponding bit in USBHS_DEVISR.
Name:
USBHS_DEVICR
Offset:
0x0008
Property:
Write-only
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
UPRSMC
EORSMC
WAKEUPC
EORSTC
SOFC
MSOFC
SUSPC
Access
W
W
W
W
W
W
W
Reset
Bit 6 – UPRSMC Upstream Resume Interrupt Clear
Bit 5 – EORSMC End of Resume Interrupt Clear
Bit 4 – WAKEUPC Wakeup Interrupt Clear
Bit 3 – EORSTC End of Reset Interrupt Clear
Bit 2 – SOFC Start of Frame Interrupt Clear
Bit 1 – MSOFC Micro Start of Frame Interrupt Clear
Bit 0 – SUSPC Suspend Interrupt Clear
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
