38.7.14 Device Endpoint x Configuration Register
| Name: | USBHS_DEVEPTCFGx |
| Offset: | 0x0100 + x*0x04 [x=0..8] |
| Reset: | 0 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| NBTRANS[1:0] | EPTYPE[1:0] | AUTOSW | EPDIR | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EPSIZE[2:0] | EPBK[1:0] | ALLOC | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 14:13 – NBTRANS[1:0] Number of transactions per microframe for isochronous endpoint
This field should be written with the number of transactions per microframe to perform high-bandwidth isochronous transfer.
It can be written only for endpoints that have this capability (see USBHS_FEATURES.ENHBISOx bit). Otherwise, this field is 0.
This field is irrelevant for non-isochronous endpoints.
| Value | Name | Description |
|---|---|---|
| 0 | 0_TRANS | Reserved to endpoint that does not have the high-bandwidth isochronous capability. |
| 1 | 1_TRANS | Default value: one transaction per microframe. |
| 2 | 2_TRANS | Two transactions per microframe. This endpoint should be configured as double-bank. |
| 3 | 3_TRANS | Three transactions per microframe. This endpoint should be configured as triple-bank. |
Bits 12:11 – EPTYPE[1:0] Endpoint Type
This field should be written to select the endpoint type:
This field is cleared upon receiving a USB reset.
| Value | Name | Description |
|---|---|---|
| 0 | CTRL | Control |
| 1 | ISO | Isochronous |
| 2 | BLK | Bulk |
| 3 | INTRPT | Interrupt |
Bit 9 – AUTOSW Automatic Switch
This bit is cleared upon receiving a USB reset.
| Value | Description |
|---|---|
| 0 | The automatic bank switching is disabled. |
| 1 | The automatic bank switching is enabled. |
Bit 8 – EPDIR Endpoint Direction
This bit is cleared upon receiving a USB reset.
0 (OUT): The endpoint direction is OUT.
1 (IN): The endpoint direction is IN (nor for control endpoints).
Bits 6:4 – EPSIZE[2:0] Endpoint Size
This field should be written to select the size of each endpoint bank:
This field is cleared upon receiving a USB reset (except for endpoint 0).
| Value | Name | Description |
|---|---|---|
| 0 | 8_BYTE | 8 bytes |
| 1 | 16_BYTE | 16 bytes |
| 2 | 32_BYTE | 32 bytes |
| 3 | 64_BYTE | 64 bytes |
| 4 | 128_BYTE | 128 bytes |
| 5 | 256_BYTE | 256 bytes |
| 6 | 512_BYTE | 512 bytes |
| 7 | 1024_BYTE | 1024 bytes |
Bits 3:2 – EPBK[1:0] Endpoint Banks
This field should be written to select the number of banks for the endpoint:
For control endpoints, a single-bank endpoint (0b00) should be selected.
This field is cleared upon receiving a USB reset (except for endpoint 0).
| Value | Name | Description |
|---|---|---|
| 0 | 1_BANK | Single-bank endpoint |
| 1 | 2_BANK | Double-bank endpoint |
| 2 | 3_BANK | Triple-bank endpoint |
| 3 | Reserved |
Bit 1 – ALLOC Endpoint Memory Allocate
This bit is cleared upon receiving a USB reset (except for endpoint 0).
| Value | Description |
|---|---|
| 0 | Frees the endpoint memory. |
| 1 | Allocates the endpoint memory. The user should check the USBHS_DEVEPTISRx.CFGOK bit to know whether the allocation of this endpoint is correct. |