38.7.33 Host Global Interrupt Clear Register

This register always reads as zero.

The following configuration values are valid for all listed bit names of this register:

0: No effect.

1: Clears the corresponding bit in USBHS_HSTISR.

Name: USBHS_HSTICR
Offset: 0x0408
Property: Write-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
  HWUPICHSOFICRXRSMICRSMEDICRSTICDDISCICDCONNIC 
Access WWWWWWW 
Reset  

Bit 6 – HWUPIC Host Wakeup Interrupt Clear

Bit 5 – HSOFIC Host Start of Frame Interrupt Clear

Bit 4 – RXRSMIC Upstream Resume Received Interrupt Clear

Bit 3 – RSMEDIC Downstream Resume Sent Interrupt Clear

Bit 2 – RSTIC USB Reset Sent Interrupt Clear

Bit 1 – DDISCIC Device Disconnection Interrupt Clear

Bit 0 – DCONNIC Device Connection Interrupt Clear