38.7.44 Host Pipe x Configuration Register (High-speed Bulk-out or High-speed Control Pipe)
This configuration is relevant only if PTYPE = 0x0 or 0x2 in ”Host Pipe x Configuration Register”.
| Name: | USBHS_HSTPIPCFGx (HSBOHSCP) |
| Offset: | 0x0500 + x*0x04 [x=0..8] |
| Reset: | 0 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| BINTERVAL[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| PINGEN | PEPNUM[3:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| PTYPE[1:0] | AUTOSW | PTOKEN[1:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PSIZE[2:0] | PBK[1:0] | ALLOC | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 31:24 – BINTERVAL[7:0] bInterval Parameter for the Bulk-Out/Ping Transaction
This field contains the Ping/Bulk-out period.
• If BINTERVAL > 0 and PINGEN = 1, one PING token is sent every bInterval microframe until it is ACKed by the peripheral.
• If BINTERVAL = 0 and PINGEN = 1, multiple consecutive PING tokens are sent in the same microframe until they are ACKed.
• If BINTERVAL > 0 and PINGEN = 0, one OUT token is sent every bInterval microframe until it is ACKed by the peripheral.
• If BINTERVAL = 0 and PINGEN = 0, multiple consecutive OUT tokens are sent in the same microframe until they are ACKed.
This value must be in the range from 0 to 255.
Bit 20 – PINGEN Ping Enable
This bit is relevant for High-speed Bulk-out transaction only (including the control data stage and the control status stage).
This bit is cleared upon sending a USB reset.
| Value | Description |
|---|---|
| 0 | Disables the ping protocol. |
| 1 | Enables the ping mechanism according to the USB 2.0 Standard. |
Bits 19:16 – PEPNUM[3:0] Pipe Endpoint Number
This field contains the number of the endpoint targeted by the pipe. This value is from 0 to 9.
This field is cleared upon sending a USB reset.
Bits 13:12 – PTYPE[1:0] Pipe Type
This field contains the pipe type.
This field is cleared upon sending a USB reset.
| Value | Name | Description |
|---|---|---|
| 0 | CTRL | Control |
| 1 | Reserved |
|
| 2 | BLK | Bulk |
| 3 | Reserved |
Bit 10 – AUTOSW Automatic Switch
This bit is cleared upon sending a USB reset.
| Value | Description |
|---|---|
| 0 | The automatic bank switching is disabled. |
| 1 | The automatic bank switching is enabled. |
Bits 9:8 – PTOKEN[1:0] Pipe Token
This field contains the pipe token.
| Value | Name | Description |
|---|---|---|
| 0 | SETUP | SETUP |
| 1 | IN | IN |
| 2 | OUT | OUT |
| 3 | Reserved |
Bits 6:4 – PSIZE[2:0] Pipe Size
This field contains the size of each pipe bank.
This field is cleared upon sending a USB reset.
| Value | Name | Description |
|---|---|---|
| 0 | 8_BYTE | 8 bytes |
| 1 | 16_BYTE | 16 bytes |
| 2 | 32_BYTE | 32 bytes |
| 3 | 64_BYTE | 64 bytes |
| 4 | 128_BYTE | 128 bytes |
| 5 | 256_BYTE | 256 bytes |
| 6 | 512_BYTE | 512 bytes |
| 7 | 1024_BYTE | 1024 bytes |
Bits 3:2 – PBK[1:0] Pipe Banks
This field contains the number of banks for the pipe.
For control pipes, a single-bank pipe (0b00) should be selected.
This field is cleared upon sending a USB reset.
| Value | Name | Description |
|---|---|---|
| 0 | 1_BANK | Single-bank pipe |
| 1 | 2_BANK | Double-bank pipe |
| 2 | 3_BANK | Triple-bank pipe |
| 3 | Reserved |
Bit 1 – ALLOC Pipe Memory Allocate
This bit is cleared when a USB Reset is requested.
Refer to ”DPRAM Management” for more details.
| Value | Description |
|---|---|
| 0 | Frees the pipe memory. |
| 1 | Allocates the pipe memory. |