5.2.1 Memory Organization

The 40 KB of eSRAM memory is divided into two banks: 32 KB and 8 KB, to store 32 bits of data and 7 check bits in SECDED-ON mode. Physically, however, the memory is organized as 
4096 × 40, which is 4096 × 5 bytes. When ECC is enabled, the fifth byte stores ECC values for the 32 bits of data. When ECC is disabled, the fifth byte location is used to create an additional 2 KB of user memory. Four locations are used for each 32-bit word.

The following table shows the organization of 4096 × 40 bits in SECDED-ON mode. The total size of the SRAM in the table is 40 KB. The locations show the memory used for the 32 KB block. ECC represents the 7-bit ECC.

Table 5-2. SRAM Organization in SECDED-ON Mode
RAM 4096X40_1

4096 x 40 Bits

RAM 4096X40_0

4096 x 40 Bits

LocationByte 4Byte 3Byte 2Byte 1Byte 0Byte 4Byte 3Byte 2Byte 1Byte 0
0ECC4003400240014000ECC0003000200010000
1ECC4007400640054004ECC0007000600050004
2046ECC5FFB5FFA5FF95FF8ECC1FFB1FFA1FF91FF8
2047ECC5FFF5FFE5FFD5FFCECC1FFF1FFE1FFD1FFC
2048ECC6003600260016000ECC2003200220012000
2049ECC6007600660056004ECC2007200620052004
4094ECC7FFB7FFA7FF97FF8ECC3FFB3FFA3FF93FF8
4095ECC7FFF7FFE7FFD7FFCECC3FFF3FFE3FFD3FFC

The following table shows the organization of 4096 × 40 bits in SECDED-OFF mode. The total size of the SRAM in the table is 40 KB. The red locations show the memory used for the 32 KB block. The green locations show memory used for the upper 8 KB block.

Table 5-3. SRAM Organization in SECDED-OFF Mode
RAM 4096X40_1

4096 x 40 Bits

RAM 4096X40_0

4096 x 40 Bits

LocationByte 4Byte 3Byte 2Byte 1Byte 0Byte 4Byte 3Byte 2Byte 1Byte 0
00001400340024001400000000003000200010000
10005400740064005400400040007000600050004
20461FF95FFB5FFA5FF95FF81FF81FFB1FFA1FF91FF8
20471FFD5FFF5FFE5FFD5FFC1FFC1FFF1FFE1FFD1FFC
20480003600360026001600000022003200220012000
20490007600760066005600400062007200620052004
40941FFB7FFB7FFA7FF97FF81FFA3FFB3FFA3FF93FF8
40951FFF7FFF7FFE7FFD7FFC1FFE3FFF3FFE3FFD3FFC