12.2.2 Port List

Table 12-1. MMUART I/O Signal Descriptions
Name	Type	Polarity	Description
MMUART_X_CTS	Input	Low	Clear to send. This signal is used in the modem interface. The active-low signal is an input that indicates when the attached device (modem) is ready to accept data. MMUART passes the information to the Cortex-M3 processor through the modem status register (Table 12-20). The register indicates that the CTSn signal is changed since the register is read last time. This signal can either go to the fabric or to the I/O pad.
MMUART_X_DSR	Input	Low	Data set ready. This signal is used in modem interface. The active-low signal is an input that indicates when the attached device (modem) is ready to set up a link with MMUART. MMUART passes the information to the Cortex-M3 processor through the Table 12-20. This register also indicates that the DSRn signal is changed since the register was read last time. This signal can either go to the fabric or to the I/O pad.
MMUART_X_DCD	Input	Low	Data carrier detect. This signal is used in the modem interface. The active-low signal is an input that indicates when the attached device (modem) has detected a carrier. MMUART passes this information to the Cortex-M3 processor through the Table 12-20. This register also indicates that the DCDn signal is changed since the register is read last time. This signal can either go to the fabric or to the I/O pad.
MMUART_X_RI	Input	Low	Ring indicator. This signal is used in the modem interface. The active-low signal is an input showing when the attached device (modem) senses a ring signal on the telephone line. MMUART passes this information to the Cortex-M3 processor through the Table 12-20. This register also gives an indication when the RI trailing edge is sensed. This signal can either go to the fabric or to the I/O pad.
MMUART_X_RTS	Output	Low	Request to send. This signal is used in the modem interface. The active-low output signal is used to inform the attached device (modem) that MMUART is ready to send data. It is programmed by the Cortex-M3 processor through the Table 12-18. This signal can either go to the fabric or to the I/O pad.
MMUART_X_DTR	Output	Low	Data terminal ready. This signal is used in the modem interface. The active-low output signal informs the attached device (modem) that MMUART is ready to establish a communications link. It is programmed by the Cortex-M3 processor through the Table 12-18. This signal can either go to the fabric or to the I/O pad.
MMUART_X_RXD	Input		Serial input data This is the data transmitted into MMUART. It is synchronized with the APB clock (master clock) input pin. This signal can either go to the fabric or to the I/O pad.
MMUART_X_TXD	Output		Serial output data. This is the data transmitted from MMUART. It is synchronized with the BAUDOUT output pin. This signal can either go to the fabric or to the I/O pad.
MMUART_X_SCK_IN	Input		Serial input synchronous clock. The MMUART_X_SCK can be configured as an input synchronous clock from master when the MMUART_X acts as a slave.
MMUART_X_SCK_OUT / BAUDOUTN	Output	Low	In Synchronous mode, it is the serial output clock, SCK_OUT. MMUART_X_SCK can be configured as an output synchronous clock to a slave when MMUART_X acts as a master. In Asynchronous mode, it is the baud rate clock derived from APB_X_CLK and BAUDOUTN.
MMUART_X_ESWM	Output	High	Single-wire, half-duplex enable. If this signal is active-high, then the data I/O is configured for half-duplex operation over a single-wire, using the Tx pad (out signal). If Low, then the data I/O has separate Tx (out) and Rx (in) pins. Single-wire mode enable (ESWM) signal goes to the FPGA fabric, when it can be used on any pad.
MMUART_X_TE	Output	High	Transmitter output enable. This active-high signal is used as a bi-directional enable for single-wire half-duplex operation. An active-high signal transmits out, and a Low signal is received. TE usage implies that the MMUART is configured in single-wire mode with the single-wire mode (SWM) bit.
MMUART_X_E_MST_SCK	Output	High	Enable master clock. This active-high signal is used as a bi-directional enable for the SCK_IN and SCK_OUT signals. If these signals are taken from a single  bi-directional pad, E_MST_SCK active-high designates Master mode and forces the bi-directional pad as an output. Otherwise (in case of active-low), the pad is an input for SCK_IN.
MMUART_X_OUT1	Output	Low	Output 1. This active-low output is a user-defined signal. It is programmed by the processor via the Table 12-18 and is set to the opposite value. It can be used as a bi-directional pad enable for bi-directional topology use models.
MMUART_X_OUT2	Output	Low	Output 2. This active-low output signal is a user-defined signal. It is programmed by the processor via the Table 12-18 and is set to the opposite value.

MMUART_X_CTS

Input

Low

Clear to send.

This signal is used in the modem interface. The active-low signal is an input that indicates when the attached device (modem) is ready to accept data. MMUART passes the information to the Cortex-M3 processor through the modem status register (Table 12-20). The register indicates that the CTSn signal is changed since the register is read last time. This signal can either go to the fabric or to the I/O pad.

MMUART_X_DSR

Input

Low

Data set ready.

This signal is used in modem interface. The active-low signal is an input that indicates when the attached device (modem) is ready to set up a link with MMUART. MMUART passes the information to the Cortex-M3 processor through the Table 12-20. This register also indicates that the DSRn signal is changed since the register was read last time. This signal can either go to the fabric or to the I/O pad.

MMUART_X_DCD

Input

Low

Data carrier detect.

This signal is used in the modem interface. The active-low signal is an input that indicates when the attached device (modem) has detected a carrier. MMUART passes this information to the Cortex-M3 processor through the Table 12-20. This register also indicates that the DCDn signal is changed since the register is read last time. This signal can either go to the fabric or to the I/O pad.

MMUART_X_RI

Input

Low

Ring indicator.

This signal is used in the modem interface. The active-low signal is an input showing when the attached device (modem) senses a ring signal on the telephone line. MMUART passes this information to the Cortex-M3 processor through the Table 12-20. This register also gives an indication when the RI trailing edge is sensed. This signal can either go to the fabric or to the I/O pad.

MMUART_X_RTS

Output

Low

Request to send.

This signal is used in the modem interface. The active-low output signal is used to inform the attached device (modem) that MMUART is ready to send data. It is programmed by the Cortex-M3 processor through the Table 12-18. This signal can either go to the fabric or to the I/O pad.

MMUART_X_DTR

Output

Low

Data terminal ready.

This signal is used in the modem interface. The active-low output signal informs the attached device (modem) that MMUART is ready to establish a communications link. It is programmed by the Cortex-M3 processor through the Table 12-18. This signal can either go to the fabric or to the I/O pad.

MMUART_X_RXD

Input

Serial input data

This is the data transmitted into MMUART. It is synchronized with the APB clock (master clock) input pin. This signal can either go to the fabric or to the I/O pad.

MMUART_X_TXD

Output

Serial output data.

This is the data transmitted from MMUART. It is synchronized with the BAUDOUT output pin. This signal can either go to the fabric or to the I/O pad.

MMUART_X_SCK_IN

Input

Serial input synchronous clock. The MMUART_X_SCK can be configured as an input synchronous clock from master when the MMUART_X acts as a slave.

MMUART_X_SCK_OUT / BAUDOUTN

Output

Low

In Synchronous mode, it is the serial output clock, SCK_OUT. MMUART_X_SCK can be configured as an output synchronous clock to a slave when MMUART_X acts as a master.

In Asynchronous mode, it is the baud rate clock derived from APB_X_CLK and BAUDOUTN.

MMUART_X_ESWM

Output

High

Single-wire, half-duplex enable.

If this signal is active-high, then the data I/O is configured for half-duplex operation over a single-wire, using the Tx pad (out signal). If Low, then the data I/O has separate Tx (out) and Rx (in) pins. Single-wire mode enable (ESWM) signal goes to the FPGA fabric, when it can be used on any pad.

MMUART_X_TE

Output

High

Transmitter output enable.

This active-high signal is used as a bi-directional enable for single-wire half-duplex operation. An active-high signal transmits out, and a Low signal is received. TE usage implies that the MMUART is configured in single-wire mode with the single-wire mode (SWM) bit.

MMUART_X_E_MST_SCK

Output

High

Enable master clock.

This active-high signal is used as a bi-directional enable for the SCK_IN and SCK_OUT signals. If these signals are taken from a single  bi-directional pad, E_MST_SCK active-high designates Master mode and forces the bi-directional pad as an output. Otherwise (in case of active-low), the pad is an input for SCK_IN.

MMUART_X_OUT1

Output

Low

Output 1.

This active-low output is a user-defined signal. It is programmed by the processor via the Table 12-18 and is set to the opposite value. It can be used as a bi-directional pad enable for bi-directional topology use models.

MMUART_X_OUT2

Output

Low

Output 2.

This active-low output signal is a user-defined signal. It is programmed by the processor via the Table 12-18 and is set to the opposite value.