12.4.11 Modem Control Register (MCR)
Bit Number | Name | R/W | Reset Value | Description |
---|---|---|---|---|
7 | Reserved | R/W | 0 | The software must not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit must be preserved across a read-modify-write operation. |
[6:5] | RLoop | R/W | 0 | Remote loopback enable bits. In the Remote loopback mode, when a bit is received, it is sent directly out the transmit line, bypassing the transmitter block, and disabling the receiver. In the Automatic echo mode, when a bit is received, it is sent directly out the transmit line, bypassing the transmitter block, while the receiver is still enabled. 00: Disabled (default) 01: Remote loopback enabled 10: Automatic echo enabled 11: Reserved Local loopback mode has priority over the remote/echo loopback modes. |
4 | Loop | R/W | 0 | In the Loopback mode, MMUART_x_TXD is set to
1. The MMUART_x_RXD, MMUART_x_DSR, MMUART_x_CTS, MMUART_x_RI, and MMUART_x_DCD
inputs are disconnected. The output of the transmitter shift register is looped
back into the receiver shift register. The modem control outputs (MMUART_x_DTR,
MMUART_x_RTS, MMUART_x_OUT1, and MMUART_x_OUT2) are connected internally to the
modem control inputs, and the modem control output pins are set as 1. The
transmitted data is immediately received, allowing Cortex®-M3 processor to check the operation of the MMUART_x. The
interrupts are operating in the Loopback mode. 0: Disabled (default) 1: Local loopback enabled The local loopback mode has priority over the remote loopback modes. LOOPBACK is only implemented in basic UART mode. It does function in LIN IRDA or Smart card modes. |
3 | OUT2 | R/W | 0 | Controls the output2 (OUT2) signal. Active Low 0: OUT2n is set to 1 (default) 1: OUT2n is set to 0 |
2 | OUT1 | R/W | 0 | Controls the output1 (OUT1) signal. Active Low 0: OUT1n is set to 1 (default) 1: OUT1n is set to 0 |
1 | RTS | R/W | 0 | Controls the request to send (MMUART_x_RTS) signal. Active Low 0: RTSn is set to 1 (default) 1: RTSn is set to 0 |
0 | DTR | R/W | 0 | Data terminal ready (MMUART_x_DTR) output. Active Low 0: DTRn output is set to 1 (default) 1: DTRn output is set to 0 |