15.4 GPIO Register Map

The base address of the MSS GPIO block is 0x40013000.The address offset of each MSS GPIO register is provided in the following table. The table also includes configuration, input, and output registers.

Table 15-4. MSS GPIO Register Map
Register Name Address

Offset

 Register Type Reset Value Description
GPIO_0_CFG 0x00 R/W 0x0 Configuration register for GPIO 0
GPIO_1_CFG 0x04 R/W 0x0 Configuration register for GPIO 1
GPIO_2_CFG 0x08 R/W 0x0 Configuration register for GPIO 2
GPIO_3_CFG 0x0C R/W 0x0 Configuration register for GPIO 3
GPIO_4_CFG 0x10 R/W 0x0 Configuration register for GPIO 4
GPIO_5_CFG 0x14 R/W 0x0 Configuration register for GPIO 5
GPIO_6_CFG 0x18 R/W 0x0 Configuration register for GPIO 6
GPIO_7_CFG 0x1C R/W 0x0 Configuration register for GPIO 7
GPIO_8_CFG 0x20 R/W 0x0 Configuration register for GPIO 8
GPIO_9_CFG 0x24 R/W 0x0 Configuration register for GPIO 9
GPIO_10_CFG 0x28 R/W 0x0 Configuration register for GPIO 10
GPIO_11_CFG 0x2C R/W 0x0 Configuration register for GPIO 11
GPIO_12_CFG 0x30 R/W 0x0 Configuration register for GPIO 12
GPIO_13_CFG 0x34 R/W 0x0 Configuration register for GPIO 13
GPIO_14_CFG 0x38 R/W 0x0 Configuration register for GPIO 14
GPIO_15_CFG 0x3C R/W 0x0 Configuration register for GPIO 15
GPIO_16_CFG 0x40 R/W 0x0 Configuration register for GPIO 16
GPIO_17_CFG 0x44 R/W 0x0 Configuration register for GPIO 17
GPIO_18_CFG 0x48 R/W 0x0 Configuration register for GPIO 18
GPIO_19_CFG 0x4C R/W 0x0 Configuration register for GPIO 19
GPIO_20_CFG 0x50 R/W 0x0 Configuration register for GPIO 20
GPIO_21_CFG 0x54 R/W 0x0 Configuration register for GPIO 21
GPIO_22_CFG 0x58 R/W 0x0 Configuration register for GPIO 22
GPIO_23_CFG 0x5C R/W 0x0 Configuration register for GPIO 23
GPIO_24_CFG 0x60 R/W 0x0 Configuration register for GPIO 24
GPIO_25_CFG 0x64 R/W 0x0 Configuration register for GPIO 25
GPIO_26_CFG 0x68 R/W 0x0 Configuration register for GPIO 26
GPIO_27_CFG 0x6C R/W 0x0 Configuration register for GPIO 27
GPIO_28_CFG 0x70 R/W 0x0 Configuration register for GPIO 28
GPIO_29_CFG 0x74 R/W 0x0 Configuration register for GPIO 29
GPIO_30_CFG 0x78 R/W 0x0 Configuration register for GPIO 30
GPIO_31_CFG 0x7c R/W 0x0 Configuration register for GPIO 31
GPIO_IRQ 0x80 R/W 0x0 Read Modify Write per interrupt bit.
GPIO_IN 0x84 R 0x0 GPIO input register: Read-only for input configured Ports.
GPIO_OUT 0x88 R/W 0x0 GPIO output register: Writeable/Readable for output configured ports. No action required for input configured ports.