14.4.6 Frequency Register
The Frequency register is required to calculate the real-time timeout logic. The following table describes the Frequency register.
| Bit Number | Name | R/W | Reset Value | Description |
|---|---|---|---|---|
| 7:0 | Frequency | R/W | 0x08 | PCLKx frequency in MHz from 1 to 255. If the PCLKx frequency is used, and SMBus is enabled, the SMBus timeouts are configured per the SMBus specification. If another timeout value is desired, scale the frequency value as per the following formula: Timeout scale = Fscale/Factual If the actual PCLKx frequency is 100 MHz, and a scale down is desired that results in a 3 ms timeout rather than 25 ms timeout, then: Fscale = 3/25 x Factual = 0.12 x 100 = 12 MHz Writing 12 into the Frequency register has the effect of reducing maximum timeout count value and reducing the real-time timeout from 25 ms to 3 ms. |