14.4.2 Status Register

The following table describes the Status register of the I²C peripherals.

Table 14-7. Status Register (STATUS)
Bit Number	Name	R/W	Reset Value	Description
7:0	Status register	R	0XF8	The Status register is read-only. The status values depend on the mode of operation. They are listed in Table 14-8 through Table 14-12. Whenever there is a change of state, interrupt is requested. After updating any registers, the APB interface control must clear the interrupt by clearing the SI bit of the Table 14-5 register.

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