2.7.3.1 SysTick Control and Status Register

The SYST_CTRL register enables the SysTick features. See the register summary in the preceding table for its attributes. The bit assignments are:

Figure 2-41. SYST_CTRL Register Bit Assignments

Table 2-66. SYST_CTRL Register Bit Assignments
Bits	Name	Function
[31:17]		Reserved.
[16]	COUNTFLAG	Returns 1 if timer counted to 0 since last time this was read.
[15:3]		Reserved.
[2]	CLKSOURCE	Selects the SysTick timer clock source: 1: processor clock. Determined by STCLK_DIVISOR bits in 21.5.20 M3 Configuration Register register.
[1]	TICKINT	Enables SysTick exception request: 0: counting down to zero does not assert the SysTick exception request 1: counting down to zero to asserts the SysTick exception request. Software can use COUNTFLAG to determine if SysTick has ever counted to zero.
[0]	ENABLE	Enables the counter: 0: counter disabled 1: counter enabled.

When ENABLE is set to 1, the counter loads the RELOAD value from the SYST_RVR register and then counts down. On reaching 0, it sets the COUNTFLAG to 1 and optionally asserts the SysTick depending on the value of TICKINT. It then loads the RELOAD value again, and begins counting.