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SmartFusion 2 Microcontroller Subsystem
SmartFusion 2 Microcontroller Subsystem
  1. Home
  2. 18 System Timer
  3. 18.2 Functional Description
  4. 18.2.2 Port List
  5. 18.2.2.1 Clocks

  • Introduction
  • 1 Cortex-M3 Processor Overview and Debug Features
  • 2 Cortex-M3 Processor (Reference Material)
  • 3 Cache Controller
  • 4 Embedded NVM (eNVM) Controllers
  • 5 Embedded SRAM (eSRAM) Controllers
  • 6 AHB Bus Matrix
  • 7 High Performance DMA Controller
  • 8 Peripheral DMA
  • 9 Universal Serial Bus On-The-Go Controller
  • 10 Ethernet MAC
  • 11 CAN Controller
  • 12 MMUART Peripherals
  • 13 Serial Peripheral Interface Controller
  • 14 Inter-Integrated Circuit Peripherals
  • 15 MSS GPIO
  • 16 Communication Block
  • 17 RTC System
  • 18 System Timer
    • 18.1 Features
    • 18.2 Functional Description
      • 18.2.1 Architecture Overview
      • 18.2.2 Port List
        • 18.2.2.1 Clocks
        • 18.2.2.2 Resets
        • 18.2.2.3 Interrupts
      • 18.2.3 Details of Operation
    • 18.3 How to Use Timer
    • 18.4 Timer Register Map
  • 19 Watchdog Timer
  • 20 Reset Controller
  • 21 System Register Block
  • 22 Fabric Interface Interrupt Controller
  • 23 Fabric Interface Controller
  • 24 APB Configuration Interface
  • 25 Error Detection and Correction Controllers
  • 26 Revision History
  • Microchip FPGA Support
  • Microchip Information

18.2.2.1 Clocks

Timer is clocked by PCLK0 on the APB0 bus. PCLK is derived from the fabric alignment clock controller (FACC) output. See UG0449: SmartFusion2 and IGLOO2 Clocking Resources User Guide for more information.

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