20.3.1.2 Peripheral Initialization

CoreResetP generates reset signals to initialize MDDR, FDDR, and SERDES_IF peripheral blocks. The following figure shows the CoreResetP connectivity with peripheral resets. For each SERDES_IF block, the CoreResetP generates SDIFx_PHY_RESET_N and SDIFx_CORE_RESET_N signals, which need to be connected to SERDES_IF macro on PHY_RESET_N and CORE_RESET_N respectively. For FDDR and MDDR, the CoreResetP generates CORE reset signals (FDDR_CORE_RESET_N and MDDR_DDR_AXI_S_CORE_RESET_N).