14.6.19 SLRCONA

Slew Rate Control Register
Name: SLRCONA
Offset: 0x1F3B

Bit 76543210 
   SLRA5SLRA4 SLRA2SLRA1SLRA0 
Access R/WR/WR/WR/WR/W 
Reset 11111 

Bits 4, 5 – SLRAn Slew Rate Control on RA Pins

ValueDescription
1 PORT pin slew rate is limited
0 PORT pin slews at maximum rate

Bits 0, 1, 2 – SLRAn Slew Rate Control on RA Pins

ValueDescription
1 PORT pin slew rate is limited
0 PORT pin slews at maximum rate