40.8.28 SDHC Force Event Register for Auto CMD Error Status
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | FERACES |
| Offset: | 0x50 |
| Reset: | 0x0000 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMDNI | ACMDIDX | ACMDEND | ACMDCRC | ACMDTEO | ACMD12NE | ||||
| Access | W | W | W | W | W | W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – CMDNI Force Event for Command Not Issued by Auto CMD12 Error
For testing purposes, the user can write this bit to 1 to rise the CMDNI status flag in SDHC_ACESR.
Writing this bit to 0 has no effect.
Bit 4 – ACMDIDX Force Event for Auto CMD Index Error
For testing purposes, the user can write this bit to 1 to rise the ACMDIDX status flag in SDHC_ACESR.
Writing this bit to 0 has no effect.
Bit 3 – ACMDEND Force Event for Auto CMD End Bit Error
For testing purposes, the user can write this bit to 1 to rise the ACMDEND status flag in SDHC_ACESR.
Writing this bit to 0 has no effect.
Bit 2 – ACMDCRC Force Event for Auto CMD CRC Error
For testing purposes, the user can write this bit to 1 to rise the ACMDCRC status flag in SDHC_ACESR.
Writing this bit to 0 has no effect.
Bit 1 – ACMDTEO Force Event for Auto CMD Timeout Error
For testing purposes, the user can write this bit to 1 to rise the ACMDTEO status flag in SDHC_ACESR.
Writing this bit to 0 has no effect.
Bit 0 – ACMD12NE Force Event for Auto CMD12 Not Executed
For testing purposes, the user can write this bit to 1 to rise the ACMD12NE status flag in SDHC_ACESR.
Writing this bit to 0 has no effect.