40.8.41 SDHC Debug Register

Table 40-45. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: DBGR
Offset: 0x234
Reset: 0x00
Property: -

Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
        NIDBG 
Access R/W 
Reset 0 

Bit 0 – NIDBG Non-Intrusive Debug

ValueNameDescription
0 DISABLED Reading the SDHC_BDPR via debugger increments the dual port RAM read pointer.
1 ENABLED Reading the SDHC_BDPR via debugger does not increment the dual port RAM read pointer.