25.1 BiSS Single Cycle Data Register

Note:
  1. x = Client Number, 0-3, each client has maximum of 64-bits
Table 25-3. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Gray cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
CWrite to clearSSoftware settable bitxChannel number
Name: B1SCDATAxL
Offset: 0x1F00, 0x1F08, 0x1F10, 0x1F18

Bit 3130292827262524 
 SCDATAxL[31:24] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 SCDATAxL[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 SCDATAxL[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 SCDATAxL[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:0 – SCDATAxL[31:0]  Single Cycle Data for Sensor/Actuator Data(1)