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25.5 BiSS Register Communication
Configuration Register
Table 25-7. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable
bit HC Cleared by
Hardware (Gray
cell) Unimplemented W Writable
bit HS Set by
Hardware X Bit is unknown
at Reset C Write to
clear S Software
settable bit x Channel
number
Name: B1RCCON Offset: 0x1FE0
Bit 31 30 29 28 27 26 25 24 REGNUM[5:0] Access R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 WNR STRTADDR[6:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 Access Reset
Bit 7 6 5 4 3 2 1 0 Access Reset
Bits 29:24 – REGNUM[5:0] Register Quantity
of Access bits
Bit 23 – WNR Write/Read Register Selector bit Value Description 1 Write register data 0 Read register data
Bits 22:16 – STRTADDR[6:0] Register Access Start Address bits
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