x = Client Number, 0-3,
each client has maximum of 64-bits
Table 25-4. Register Bit Attribute Legend
Symbol
Description
Symbol
Description
Symbol
Description
R
Readable
bit
HC
Cleared by
Hardware
(Gray
cell)
Unimplemented
W
Writable
bit
HS
Set by
Hardware
X
Bit is unknown
at Reset
C
Write to
clear
S
Software
settable bit
x
Channel
number
Name:
B1SCDATAxH
Offset:
0x1F04, 0x1F0C,
0x1F14, 0x1F1C
Bit
31
30
29
28
27
26
25
24
SCDATAxH[31:24]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
SCDATAxH[23:16]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
SCDATAxH[15:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
SCDATAxH[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bits 31:0 – SCDATAxH[31:0] Single Cycle Data
for Sensor/Actuator Data
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
