25.4 BiSS Client Configuration Register

Note:
  1. x = Client Number, 0 to 3
Table 25-6. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Gray cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
CWrite to clearSSoftware settable bitxChannel number
Name: B1CLTCONx
Offset: 0x1FC0, 0x1FC4, 0x1FC8, 0x1FCC

Bit 3130292827262524 
 CRCSEEDx[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 CRCSEEDx[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 CRCSELxCRCLENx[6:0]/CRCPOLYx[6:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 GRAYx/LSTOPxSCDENxSCDLENx[5:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:16 – CRCSEEDx[15:0]

Polynomial SCD CRC Calculation Start Value bit

Bit 15 – CRCSELx Select CRC bit

ValueDescription
1CRC polynomial(7:1) in CRCPOLYx
0CRC bit length in CRCLENx will apply dedicated CRC polynomials

Bits 14:8 – CRCLENx[6:0]/CRCPOLYx[6:0] Polynomial Selection by Length for SCD CRC Check bit/Polynomial for SCD CRC Check bits

CRCLENx and CRCPOLYx share the same register location.
ValueDescription
When CRCLENx is selected:
0010000CRC polynomial 0b1.1001.0000.1101.1001 = 0x190D9
0001000CRC polynomial 0b1.0010.1111 = 0x12F
0000111CRC polynomial 0b1000.1001 = 0x89
0000110CRC polynomial 0b100.0011 = 0x43
0000101CRC polynomial 0b10.0101 = 0x25
0000100CRC polynomial 0b1.0011 = 0x13
0000011CRC polynomial 0b1011 = 0xB
0000000CRC for single cycle data not present, CRC verification deactivated, CRCSELx = 0b0
When CRCPOLYx is selected:
11111111-0000001CRC polynomial for single cycle data
0000000CRC polynomial 0x00 not applicable with CRCSELx = 0b1

Bit 7 – GRAYx/LSTOPx Enable SCD Gray to Binary Conversion bit (SSI only)/Leading STOP Bit on Single Cycle bit (actuator data only)

GRAYx and LSTOPx share the same register location.
ValueDescription
When GRAYx is selected
1SSI single cycle data gray coded
0SSI single cycle data binary coded
When LSTOPx is selected:
1Leading STOP Bit on Single Cycle Actuator Data (Do not send STOP bit before Actuator data
0No Leading STOP Bit on Single Cycle Actuator Data (Send STOP bit before Actuator data)

Bit 6 – SCDENx Enable Single Cycle Data bit

ValueDescription
1Single cycle data available
0Single cycle data not available

Bits 5:0 – SCDLENx[5:0] Single Cycle Data Length bit

ValueDescription
111111Single cycle data length = 64
...
000001Single cycle data length = 2
000000Single cycle data length = 1