6.6.8.10.4 FP Exception Masks

FSR bits INVAL, DIV0, OVF, UDF, INX, HUGI and SUBO have corresponding INVALM, DIV0M, OVFM, UDFM, INXM, HUGIM and SUBOM Exception Mask bits in the FCR. Should a “most-recent” exception flag be set by an operation, the corresponding Exception Mask bit in the FCR must already be clear in order to generate an interrupt.

Should an FCR Exception Mask bit be set when the corresponding FSR exception flag bit is set, no interrupt will be generated. In all cases (except SUBO which is an input operand exception), a default result (see Table 6-44) will be written. However, the corresponding “sticky” exception flag will be set and remain set until manually cleared.

Note: If not masked, interrupts are generated at the time the corresponding flag is set (i.e., they are generated by the leading edge of the flag set operation). However, setting a flag (in FSR [6:0]) when the corresponding exception is enabled will not generate an interrupt. Should forcing an interrupt be required (e.g., during debug), it may be achieved by setting the FPU interrupt flag (in the interrupt controller). Conversely, unmasking a previously masked exception when its flag is already set will not generate an interrupt.
Table 6-47. FP Instruction Exception Conditions
InstructionExceptions (FSR[6:0])ConditionsDefault Results and Notes
SUBOHUGIINXUDFOVFDIV0INVAL
FMOV
FMOVC
Status Bit Set/Clear/Update Instructions
FANDLogical AND with FSR[15:0]
FIORLogical OR with FSR[15:0]No exceptions are generated as a consequence of setting an exception flag
FTSTNo result delivered other than FTST status (FSR[28:24])
Conversion Instructions
FLI2F000000INX: See Generating FP ExceptionsINX: Destination will be written with inexact floating-point result.
FDI2F000000INX: See Generating FP ExceptionsINX: Destination will be written with inexact floating-point result.
FF2LI000HUGI: Result exceeds target register size

INX: See Generating FP Exceptions

INVAL: ∞, sNaN or qNaN

SUBO: Subnormal operand(3)

HUGI: Destination will be written with either most positive or most negative integer, matching sign of input operand.

HUGI will also cause INVAL to be set.

INX: Destination will be written with inexact integer result.

INVAL: Destination will be written with integer indefinite value if HUGI is not set, or value defined above if HUGI is set.

Assertion of SUBO will not affect integer result.
FF2DI000HUGI: Result exceeds target register size

INX: See Generating FP Exceptions

INVAL: ∞, sNaN or qNaN

SUBO: Subnormal operand(3)

HUGI: Destination will be written with either most positive or most negative integer, matching sign of input operand.

HUGI will also cause INVAL to be set.

Note: INX: Destination will be written with inexact integer result.

INVAL: Destination will be written with integer indefinite value if HUGI is not set, or value defined above if HUGI is set.

Assertion of SUBO will not affect integer result.

Comparison Instructions
FCPS00000INVAL: sNaN or qNaN

SUBO: Subnormal operand(3)

No result delivered other than FCPS/FCPQ status (FSR[19:16])
FCPQ00000INVAL: sNaN

SUBO: Subnormal operand(3)

No result delivered other than FCPS/FCPQ status (GT, LT, EQ or UN)
FFLIM00000INVAL: sNaN

SUBO: Subnormal operand(3)

Refer to Table 6-37 for result delivered. Operand value of -0 compares to less than +0.
FMAX00000INVAL: sNaN

SUBO: Subnormal operand(3)

Refer to Table 6-36 for result delivered. Operand value of -0 compares to less than +0.
FMAXNUM00000INVAL: sNaN

SUBO: Subnormal operand(3)

Refer to Table 6-36 for result delivered. Operand value of -0 compares to less than +0.
FMIN00000INVAL: sNaN

SUBO: Subnormal operand(3)

Refer to Table 6-36 for result delivered. Operand value of -0 compares to less than +0.
FMINNUM00000INVAL: sNaN

SUBO: Subnormal operand(3)

Refer to Table 6-36 for result delivered. Operand value of -0 compares to less than +0.
Math Instructions
FADD00INX: See Generating FP Exceptions

UDF: See Generating FP Exceptions

OVF: See Generating FP Exceptions

INVAL: ((-∞) + ∞) or sNaN

SUBO: Subnormal operand(3)

INX: Will also be set if OVF is set. Will also be set if UDF is set and result is not an exact subnormal.

INX/UDF/OVF: Destination will be written with rounded result. 2

Note: INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.1
FSUB00INX: See Generating FP Exceptions

UDF: See Generating FP Exceptions

OVF: See Generating FP Exceptions

INVAL: (∞ - ∞) or sNaN

SUBO: Subnormal operand(3)

INX: Will also be set if OVF is set. Will also be set if UDF is set and result is not an exact subnormal.

INX/UDF/OVF: Destination will be written with rounded result. 2

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.

FNEGSUBO: Subnormal operand(3)IEEE-754 requires no result exceptions be signaled. Subnormal operand exception signaled or SAZ mode applied to ensure result consistency with that of an equivalent sequence of FPU arithmetic instructions.
FABSSUBO: Subnormal operand(3)IEEE-754 requires no result exceptions be signaled. Subnormal operand exception signaled (or SAZ mode applied) to ensure result consistency with that of an equivalent sequence of FPU arithmetic instructions.
FMUL00INX: See Generating FP Exceptions

UDF: See Generating FP Exceptions

OVF: See Generating FP Exceptions

INVAL: (0 * ∞) or (∞ * 0) or sNaN

SUBO: Subnormal operand(3)

INX: Will also be set if OVF is set. Will also be set if UDF is set and result is not an exact subnormal.

INX/UDF/OVF: Destination will be written with rounded result. 2

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.

FMAC00INX: See Generating FP Exceptions

UDF: See Generating FP Exceptions

OVF: See Generating FP Exceptions

INVAL: (0 * ∞)+c or (∞ * 0)+c or sNaN

SUBO: Subnormal operand(3)

INX: Will also be set if OVF is set. Will also be set if UDF is set and result is not an exact subnormal.

INX/UDF/OVF: Destination will be written with rounded result. 2

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.1

INVAL will also be signaled if accumulation is a subtraction of infinities.
FDIV0INX: See Generating FP Exceptions

UDF: See Generating FP Exceptions

OVF: See Generating FP Exceptions

DIV0: Finite Dividend with Divisor = 0

INVAL: (0/0) or (∞/∞) or sNaN

SUBO: Subnormal operand(3)

INX: Will also be set if OVF is set. Will also be set if UDF is set and result is not an exact subnormal.

INX/UDF/OVF: Destination will be written with rounded result. 2

DIV0: Result of (±x/±0) will be ±∞ by default, where sign is XOR of operand signs

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.1

(0/0) or (∞/0) are special cases and will not set DIV0. Result of (∞/0) is correctly signed infinity. Result of (0/0) is the distinguished qNaN with INVAL signaled.
FSQRT0000INVAL: x < 0 or sNaN

SUBO: Subnormal operand(3)

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.(1)

FSQRT(±0) = ±0 (no exception signaled)

FSIN000INX:See Generating FP Exceptions

UDF:See Generating FP Exceptions

INVAL: | x | = ∞ or sNaN

SUBO: Subnormal operand(3)

INX: Will also be set if UDF is set and result is not an exact subnormal.

INX/UDF: Destination will be written with rounded result. (2)

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.(1)

FCOS000INVAL: | x | = ∞ or sNaN

SUBO: Subnormal operand(3)

INVAL: Destination will be written with the distinguished qNaN or quieted sNaN.(1)
Key: ⇕ = set or cleared, ‘0’ = always cleared, — = unchanged, ⇑ = may be cleared but never set, ⇓ = may be set but never cleared
Note:
  1. In all cases where INVAL is signaled as the result of an sNaN operand, the destination will be written with the quieted sNaN.
  2. Underflow result is defined in Table 6-44 when SOV mode enabled and Underflow exception is not enabled.
  3. The Subnormal Operand exception (SUBO) is an input operand exception (all other exceptions are related to operation results). SUBO never signaled if SAZ mode enabled.