7.7.11 PIE0
Peripheral Interrupt
Enable Register 0Note:
- The External Interrupt INT pin is
selected by INTPPS.
Note: Bit PEIE of the INTCON register must be set to enable
any peripheral interrupt controlled by PIE1-PIE8. Interrupt sources controlled by the
PIE0 register do not require PEIE to be set in order to allow interrupt vectoring (when
GIE is set).
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | TMR0IE | IOCIE | | | | INTE | |
| Access | | | R/W | R/W | | | | R/W | |
| Reset | | | 0 | 0 | | | | 0 | |
Bit 5 – TMR0IE
Timer0 Interrupt Enable bit
| Value | Description |
|---|
1 |
Enabled |
0 |
Disabled |
Bit 4 – IOCIE
Interrupt-on-Change Enable bit
| Value | Description |
|---|
1 |
Enabled |
0 |
Disabled |
Bit 0 – INTE
External Interrupt Enable bit(1)
| Value | Description |
|---|
1 |
Enabled |
0 |
Disabled |
The External Interrupt INT pin is
selected by INTPPS.
Bit PEIE of the INTCON register must be set to enable
any peripheral interrupt controlled by PIE1-PIE8. Interrupt sources controlled by the
PIE0 register do not require PEIE to be set in order to allow interrupt vectoring (when
GIE is set).