7.7.10 PIR8

Peripheral Interrupt Request (Flag) Register 8

Note: Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit, GIE, of the INTCON appropriate interrupt flag bits are clear prior to enabling an interrupt.
Name: PIR8
Address: 0x714

Bit 76543210 
   SMT2PWAIFSMT2PRAIFSMT2IFSMT1PWAIFSMT1PRAIFSMT1IF 
Access R/W/HSR/W/HSR/W/HSR/W/HSR/W/HSR/W/HS 
Reset 000000 

Bit 5 – SMT2PWAIF SMT2 Pulse-Width Acquisition Interrupt Flag bit

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 4 – SMT2PRAIF SMT2 Period Acquisition Interrupt Flag bit

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 3 – SMT2IF SMT2 Interrupt Flag bit

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 2 – SMT1PWAIF SMT1 Pulse-Width Acquisition Interrupt Flag bit

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 1 – SMT1PRAIF SMT1 Period Acquisition Interrupt Flag bit

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred

Bit 0 – SMT1IF SMT1 Interrupt Flag bit

ValueDescription
1 Interrupt has occurred (must be cleared by software)
0 Interrupt event has not occurred
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the Global Enable bit, GIE, of the INTCON appropriate interrupt flag bits are clear prior to enabling an interrupt.