7.7.16 PIE5

Peripheral Interrupt Enable Register 5

Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1-PIE8.
Name: PIE5
Address: 0x71B

Bit 76543210 
 CLC4IECLC3IECLC2IECLC1IE TMR5GIETMR3GIETMR1GIE 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 7 – CLC4IE CLC4 Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 6 – CLC3IE CLC3 Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 5 – CLC2IE CLC2 Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 4 – CLC1IE CLC1 Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 2 – TMR5GIE TMR5 Gate Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 1 – TMR3GIE TMR3 Gate Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled

Bit 0 – TMR1GIE TMR1 Gate Interrupt Enable bit

ValueDescription
1 Enabled
0 Disabled
Bit PEIE of the INTCON register must be set to enable any peripheral interrupt controlled by registers PIE1-PIE8.