7.7.14 PIE3
Peripheral Interrupt Enable Register 3
Note: Bit PEIE of the
INTCON register must be set to enable any peripheral interrupt
controlled by registers PIE1-PIE8.
Name: | PIE3 |
Address: | 0x719 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
RC2IE | TX2IE | RC1IE | TX1IE | BCL2IE | SSP2IE | BCL1IE | SSP1IE | ||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 5, 7 – RCnIE EUSARTn Receive Interrupt Enable bit
Value | Description |
---|---|
1 |
Enabled |
0 |
Disabled |
Bits 4, 6 – TXnIE EUSARTn Transmit Interrupt Enable bit
Value | Description |
---|---|
1 |
Enabled |
0 |
Disabled |
Bits 1, 3 – BCLnIE MSSPn Bus Collision Interrupt Enable bit
Value | Description |
---|---|
1 |
Enabled |
0 |
Disabled |
Bits 0, 2 – SSPnIE Synchronous Serial Port ‘n’ Interrupt Enable bit
Value | Description |
---|---|
1 |
Enabled |
0 |
Disabled |