10.4.15.3 Two Port RAM Parameter Description

The following table lists the Two Port RAM signals in generated netlists.

Table 10-204. Parameter Description
Name	Type	Genfile Parameter	Bit/Bus	Description
WADDR	OUT	WADDRESS_PN	BUS	Write address
WD	IN	DATA_IN_PIN	BUS	Write data input
WEN	IN	WE_PN	Bit	Write enable
WCLK	IN	WCLOCK_PN	Bit	Write clock
RADDR	OUT	RADDRESS_PN	Bus	Read address
RD	OUT	DATA_OUT_PN	Bus	Read data input
RESET	IN	RESET_PN	Bit	Asynchronous reset
REN	IN	RE_PN	Bit	Read enable
RCLK	IN	RCLOCK_PN	Bit	Read clock
LP	IN	LP_PN	Bit	Low power input
FF	IN	FF_PN	Bit	Flash*Freeze input
RWCLK	IN	CLOCK_PN	Bit	Single clock for Two Port RAM